STEPS IN FPGA DESIGN

STEPS IN FPGA DESIGN

These were the points jotted down  from today’s introduction given by Prof SP Venumadhava Rao, HoD-ECE Dept-JBIET

Steps in FPGA Design :

1.       Chose either Verilog or VHDL as your programming Language.

2.       Choose XILINX ISE as your programming environment.

3.       Steps in design..

a.       Code using structural/dataflow/behavioral/other models

b.      Compile

c.       Simulate

d.      Synthesize (use XILINX  synthesis number)

                                                               i.      Place and route

                                                             ii.      Timing Analysis Report

                                                            iii.      Number of slices occupied – must be minimum

                                                           iv.      Pictorial

e.      Implementation

                                                               i.      Use ACTUAL XILINX Series NUMBER

                                                             ii.      PIN ASSIGNMENT:  Very important –get this from the supplier. Must assign inputs and outputs to I/O Bank port pin properly.

f.        Download Bit stream

g.       Implementation

Note: During simulation it is mandatory to design a suitable test bench and use it to test the implementation

Design examples to begin with:

Note: Use clock mode always

Half-Adder, Full-Adder, Half-Subtractor, Full-Subtractor,  4-,6-,8-bit Subtractor.

Apply Real-Time Delays as far as possible to make the design robust for practical applications.

Q: What is Static Timing Analysis?